1. Field of Invention
The present invention relates to a display panel driving device and a method thereof, and more particularly, to a TFT liquid crystal display panel driving device and a method thereof.
2. Description of Related Art
At present, the mainstream TFT liquid crystal display panel adopts an operational amplifier to drive the pixel units on a display at different voltages, so as to display different frames on the display. Therefore, the display quality of the display and the features of the operational amplifier are highly correlative. The main variable of the operational amplifier affecting the frame quality is offset voltage generated due to changes in the process. Conventionally, two conventional methods are mainly used to eliminate the offset voltage: one is auto zeroing, wherein a capacitor is required to store the offset voltage, resulting in the need of extra control signals and increase of the circuit area; and the other is using a chopper to compensate the offset voltage.
FIG. 1A is a block diagram of a driving device of a conventional TFT liquid crystal display panel adopting a chopper. Display data 1˜n are input into operational amplifiers 12_1˜12_n with chopper function through digital-to-analog converters 11_1˜11_n. A control signal controls the operational amplifiers 12_1˜12_n to modulate the offset voltages. The operational amplifiers 12_1˜12_n output voltages to channels 1˜n. FIG. 1B is a voltage-to-time diagram of the polarity (POL) signal and control signal of FIG. 1A, wherein the longitudinal axis of FIG. 1B represents voltage and the horizontal axis represents time. In the most common dot inversion driving architecture at present, the POL signal controls the output polarity of the source driver and is converted at every one frame, wherein frames F11, F12, F13, F14 are displayed at the time periods 0˜T11, T11˜T12, T12˜T13, T13˜T14. The control signal is Logic 1 at frames F11 and F12, and Logic 0 at frames F13 and F14. FIG. 1C is a voltage-to-time diagram of an ideal output waveform 102 and an actual output waveform 101 in FIG. 1A, wherein the longitudinal axis of FIG. 1C represents voltage and the horizontal axis represents time. When the frame F11 is displayed, the voltage of the ideal output waveform 102 is VP1, and the voltage of the actual output waveform 101 is V1, thus generating an offset voltage of V1−VP1=ΔV. When the frame F12 is displayed, the voltage of the ideal output waveform 102 is VN1, and the voltage of the actual output waveform 101 is V2, thus generating an offset voltage of V2−VN1=ΔV. When the frame F13 is displayed, the offset voltage is V3−VP1=−ΔV. When the frame F14 is displayed, the offset voltage is V4−VN1=−ΔV. FIG. 1D is an offset voltage distribution diagram of the frames F11˜F14. The offset voltages of the pixels in the frames F11 and F12 are all ΔV, while those of frames F13 and F14 are all −ΔV. As the human eye can be considered to be a low-pass filter, after the control signal controls the operational amplifier with chopper function for a short period of time, the human eye can compensate the offset voltage, and thus the offset voltage is 0 to the human eye.
Though the method solves the offset voltage problem of the operational amplifier, taking 60 frames per second as an example, for each pixel on the panel, there are 30 positive polarity voltages and 30 negative polarity voltages on the pixel. To compensate the offset voltages, the 30 positive polarity voltages and 30 negative polarity voltages are respectively further divided into 15 positive offset voltages and 15 negative offset voltages. The frequency of a chopper is a quarter that of a frame, and under such a low time frequency, the human eye can easily sense the changes in brightness in the whole area, thus causing the frame flickering phenomenon. Therefore, as the aforementioned conventional art uses time modulation to control the chopper, the frame quality is greatly degraded.